1. Field of the Invention
The present invention relates to a semiconductor package process. More particularly, the present invention relates to a method of fabricating a multi-chip package structure.
2. Description of Related Art
With an advancement of semiconductor technologies, high density integrated circuit (IC) packages such as ball grid array (BGA) packages, chip-scale packages (CSPs), flip chip (F/C) packages, and multi-chip module (MCM) packages have been correspondingly developed. On account of an application of bumps instead of wires for reducing the length of connection circuits between chips and carriers in the above-mentioned high density IC packages, a transmission speed of signals between the chips and the carriers is significantly improved.
FIG. 1 is a schematic cross-sectional view showing a conventional multi-chip package structure. Referring to FIG. 1, a multi-chip package structure 100 includes a carrier 110, a first chip 120, a second chip 130, a plurality of bonding wires 140, and a molding encapsulant 150. A plurality of pads 112, a plurality of pads 114, and a plurality of pads 116 are disposed on the carrier 110. The first chip 120 has an active surface S1 and a back surface S2. A plurality of bumps 122 is disposed on the active surface S1. The first chip 120 is electrically connected to the pads 112 via the bumps 122. In addition, the second chip 130 is disposed on the first chip 120 and has an active surface S3 and a back surface S4. The active surface S3 of the second chip 130 is electrically connected to the pads 116 of the carrier 110 via the plurality of bonding wires 140. The molding encapsulant 150 encapsulates the first chip 120, the second chip 130, and the bonding wires 140. In addition, the molding encapsulant 150 fills between the first chip 120 and the carrier 110.
However, the entire thickness and the dimension of the multi-chip package structure 100 are not apt to be reduced, thus diverging from the demands on miniaturization of the chip package structures and deteriorating the competitiveness of relevant products.